1. Field of the Invention
The present invention relates to apparatuses for measuring a conductive pattern on a substrate.
2. Description of the Related Art
Conventional apparatuses for measuring a conductive pattern on a substrate typically contact substrates to be tested by using probes to apply a voltage to the substrates so as to detect the conductive pattern on the substrate, such as short circuits or open circuits etc. Probe card detection apparatuses and probe detection apparatuses are commonly used contact probe electrical detection apparatuses for semiconductor dies and printed circuit boards, respectively. However, with the shrinkage of the process line width, the detection using the conventional probe card detection apparatuses is limited by the detection limits of the physical dimensions of the probes. Further, the cost of a probe card is really high.
On the other hand, with the area of the formed substrate getting larger, speed of detecting needs is getting faster. Specifically, the requirement of whole surface detection is increasing, such as the detection of arrays of display panels, thin film solar cells, touch panels, and flexible displays. The sampling detection method of using probes in contact for measuring electric properties is increasingly becoming more and more unsuitable for the requirement of actual detection.
As mentioned above, the conventional method of measuring electric properties of the to-be-tested substrate by using probes to contact requires a long time. The formed line widths are getting smaller due to the improvement in advanced processing technology, but the sizes which can be detected by the probes are limited and fabrication cost of a probe card is very high. U.S. Pat. Nos. 5,097,201 and 5,170,127 disclose a non-contact type electrical measurement method. An electro-optical modulator such as a polymer dispersed liquid crystal (PDLC) panel or an optical crystal (for example, KDP, KD*P, or ADP) is used. A specific distance (of about 10 μm) is kept between the to-be-tested substrate and the electro-optical modulator, and the to-be-tested substrate and the electro-optical modulator are applied with a positive voltage and a negative voltage respectively so as to form a capacitance and an induced electric field therebetween. The electro-optical modulator is driven by the induced electric filed and the induced voltage image of the electro-optical modulator is recorded by a CCD. The thickness or residual amount of the conducting layer (such as an ITO layer) after a patterning process may be detected by analyzing the variation of the intensity of the gray level of the voltage image to check if the etching of the conducting material in a previous process is complete or if there is any influence on electrical properties of conductive patterns due to surface defects. However, the detecting method of using an electro-optical modulator is limited by the detecting area.
In order to resolve the problems concerning large-area detection and detection efficiency as mentioned above, prior art such as the detecting method disclosed by U.S. Pat. No. 5,504,438 uses a plurality of CCDs to capture images. Then, a following image stitching process is used to increase the detecting area and improve the detection efficiency. However, using a plurality of CCDs will increase fabrication cost. In order to resolve problems concerning increased fabrication costs, U.S. Pat. Nos. 7,466,161 and 7,468,611 disclose a structure using linear CCDs with a gantry apparatus. Through linear scanning, the detecting area is increased and the detection efficiency is improved. However, a specific distance (of about 10 μm) needs to be maintained between the to-be-tested substrate and the electro-optical modulator and the precision of the electrical control and the structure of the scanning apparatus needs to be improved.